DulyRun Wave 0 / report 1
DSpark slot-bound control
PASS for the listed source-derived synthetic slot checks. Model response correctness and release safety were not evaluated.
Result: the deliberately stale block 99 appeared in all three defective-source arms. Both fixed-source arms kept every draft slot inside the reserved blocks.
Protocol
- Workload: source-derived DSpark fill-in allocation bounds and real CUDA slot preparation, without model weights.
- Sequence: A1, A2, B1, A3, B2 on one NVIDIA H100 NVL.
- Baseline commit:
58eff92e78422231d670a0725b87508d351bdad8. - Fixed commit:
a26af2d9db6518f09fbf635c6b3ea64caeecce32. - Only the exact source-derived lookahead property differed between the arms.
| Arm | Source state | Observed outcome | Allocated blocks | Final draft block |
|---|---|---|---|---|
| A1 | Defective | Expected assertion failure | 9 | 99 |
| A2 | Defective | Expected assertion failure | 9 | 99 |
| B1 | Fixed | Pass | 10 | 10 |
| A3 | Defective | Expected assertion failure | 9 | 99 |
| B2 | Fixed | Pass | 10 | 10 |
QA
All eight scoped checks passed: exact primary sources reopened, source states pinned, project-derived reproducer retained, actual environment recorded, five raw runs retained, protocol held constant, categorical oracle and A/A repetitions checked, and claims limited to this fixture.
Limits: no speed claim. Wrapper wall time included setup and compilation, while A/A timing noise exceeded the threshold. Full engine behavior, actual KV-cache writes, model inference, model answers, memory capacity, security, and release safety were not tested.